<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<?xml-stylesheet href="one_register.xsl" type="text/xsl" ?>







<register_page>
  <registers>
  
    <register is_register="True" is_internal="False" is_stub_entry="False">
      <reg_short_name>EDESR</reg_short_name>
        
        <reg_long_name>External Debug Event Status Register</reg_long_name>

        <power_domain_text>EDESR is in the Core power domain</power_domain_text>


      
      

    
  <reg_address
      external_access="True"
    mem_map_access="True"
      power_domain="None"
  >
    <reg_component>Debug</reg_component>
    <reg_offset><hexnumber>0x020</hexnumber></reg_offset>
    <reg_instance>EDESR</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_level>When DoubleLockStatus() or !IsCorePowered()</reg_access_level>
          <reg_access_type>ERROR</reg_access_type>
      </reg_access_state>
        
      <reg_access_state>
          <reg_access_level>When SoftwareLockStatus(addrdesc)</reg_access_level>
          <reg_access_type>RO</reg_access_type>
      </reg_access_state>
        
      <reg_access_state>
          <reg_access_type>RW</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>



          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Indicates the status of internally pending Halting debug events.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
          <reg_group>Debug</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>EDESR is a 32-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="32">
  <text_before_fields/>
  <field id="fieldset_0-31_4" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>31</field_msb>
    <field_lsb>4</field_lsb>
    <rel_range>31:4</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-3_3-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>EC</field_name>
    <field_msb>3</field_msb>
    <field_lsb>3</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Exception Catch debug event pending.</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Exception Catch debug event is not pending.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Exception Catch debug event is pending.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <field_access>
      <field_access_state>
        <field_access_type>W1C</field_access_type>
      </field_access_state>
    </field_access>
    <fields_condition>When FEAT_Debugv8p8 is implemented</fields_condition>
  </field>
  <field id="fieldset_0-3_3-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>3</field_msb>
    <field_lsb>3</field_lsb>
    <rel_range>3</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-2_2-1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SS</field_name>
    <field_msb>2</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Halting step debug event pending. Possible values of this field are:</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Reading this means that a Halting step debug event is not pending. Writing this means no action.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Reading this means that a Halting step debug event is pending. Writing this clears the pending Halting step debug event.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Cold">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
    <fields_condition>When FEAT_DoPD is implemented</fields_condition>
  </field>
  <field id="fieldset_0-2_2-2" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" reserved_type="RES0">
    <field_name>SS</field_name>
    <field_msb>2</field_msb>
    <field_lsb>2</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>Halting step debug event pending. Possible values of this field are:</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Reading this means that a Halting step debug event is not pending. Writing this means no action.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Reading this means that a Halting step debug event is pending. Writing this clears the pending Halting step debug event.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_other_field>
          <field_reset_other_field_regname state="ext">EDECR</field_reset_other_field_regname>
          <field_reset_other_field_fieldname>SS</field_reset_other_field_fieldname>
        </field_reset_other_field>
      </field_reset>
    </field_resets>
    <fields_condition>Otherwise</fields_condition>
  </field>
  <field id="fieldset_0-1_1" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>RC</field_name>
    <field_msb>1</field_msb>
    <field_lsb>1</field_lsb>
    <rel_range>1</rel_range>
    <field_description order="before">
      <para>Reset Catch debug event pending. Possible values of this field are:</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Reading this means that a Reset Catch debug event is not pending. Writing this means no action.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Reading this means that a Reset Catch debug event is pending. Writing this clears the pending Reset Catch debug event.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_conditions>
          <field_reset_condition condition="FEAT_DoPD is implemented">
            <field_reset>
              <field_reset_other_field>
                <field_reset_other_field_regname state="ext">CTIDEVCTL</field_reset_other_field_regname>
                <field_reset_other_field_fieldname>RCE</field_reset_other_field_fieldname>
              </field_reset_other_field>
            </field_reset>
          </field_reset_condition>
          <field_reset_condition condition="FEAT_DoPD is not implemented">
            <field_reset>
              <field_reset_other_field>
                <field_reset_other_field_regname state="ext">EDECR</field_reset_other_field_regname>
                <field_reset_other_field_fieldname>RCE</field_reset_other_field_fieldname>
              </field_reset_other_field>
            </field_reset>
          </field_reset_condition>
        </field_reset_conditions>
      </field_reset>
    </field_resets>
  </field>
  <field id="fieldset_0-0_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False">
    <field_name>OSUC</field_name>
    <field_msb>0</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>0</rel_range>
    <field_description order="before">
      <para>OS Unlock Catch debug event pending. Possible values of this field are:</para>
    </field_description>
    <field_values impdef="False">
      <field_value_instance>
        <field_value>0b0</field_value>
        <field_value_description>
          <para>Reading this means that an OS Unlock Catch debug event is not pending. Writing this means no action.</para>
        </field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b1</field_value>
        <field_value_description>
          <para>Reading this means that an OS Unlock Catch debug event is pending. Writing this clears the pending OS Unlock Catch debug event.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_resets>
      <field_reset reset_type="Warm">
        <field_reset_number>'0'</field_reset_number>
      </field_reset>
    </field_resets>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="32">
  <fieldat id="fieldset_0-31_4" msb="31" lsb="4"/>
  <fieldat id="fieldset_0-3_3-1" msb="3" lsb="3"/>
  <fieldat id="fieldset_0-2_2-1" msb="2" lsb="2"/>
  <fieldat id="fieldset_0-1_1" msb="1" lsb="1"/>
  <fieldat id="fieldset_0-0_0" msb="0" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          


  
    
      <access_permission_text>
        <para>If a request to clear a pending Halting debug event is received at or about the time when halting becomes allowed, it is <arm-defined-word>CONSTRAINED UNPREDICTABLE</arm-defined-word> whether the event is taken.</para>

      </access_permission_text>
      <access_permission_text>
        <para>If Core power is removed while a Halting debug event is pending, it is lost. However, it might become pending again when the Core is powered back on and Cold reset.</para>
      </access_permission_text>





    

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>