EDHSR External Debug Halting Syndrome Register EDHSR is in the Core power domain when FEAT_EDHSR is implemented Debug 0x038 EDHSR When DoubleLockStatus(), or !IsCorePowered(), or OSLockStatus() ERROR RO Holds syndrome information for a debug event. Debug The value of this register is UNKNOWN if the PE is in Non-debug state, or if EDSCR.STATUS is not 0b101011. EDHSR is a 64-bit register. 63 41 63:41 Reserved, RES0. GCS 40 40 0 Guarded control stack data access. Indicates that the Watchpoint debug event is due to a Guarded control stack data access. 0b0 The Watchpoint debug event is not due to a Guarded control stack data access. 0b1 The Watchpoint debug event is due to a Guarded control stack data access. AU When FEAT_GCS is implemented and FEAT_Debugv8p9 is implemented 40 40 40 Reserved, RES0. Otherwise 39 24 39:24 Reserved, RES0. WPT 23 18 23:18 Watchpoint number. When EDHSR.WPTV is 1, holds the index of a watchpoint that triggered the Watchpoint debug event. AU WPTV 17 17 17 Watchpoint number valid. 0b0 EDHSR.WPT field is not valid, and holds an UNKNOWN value. When FEAT_Debugv8p9 is not implemented 0b1 EDHSR.WPT field is valid, and holds the number of a watchpoint that triggered the Watchpoint debug event. AU WPF 16 16 16 Watchpoint might be false-positive. Arm strongly recommends that this bit is set to 0, other than when one of the following instructions might generate a watchpoint match for an address or address range that the instruction does not access: An SVE contiguous vector load/store instruction, when the PE is in Streaming SVE mode. An SME load/store instruction. 0b0 The watchpoint matched an address or address range that was accessed by the instruction. 0b1 The watchpoint matched an address or address range that might not have been accessed by the instruction. When FEAT_SVE is implemented or FEAT_SME is implemented AU FnP 15 15 15 EDWAR not Precise. 0b0 If the EDWAR is valid, it holds the virtual address of an access or sequence of contiguous accesses that triggered the Watchpoint debug event. 0b1 If the EDWAR is valid, it holds any virtual address within the smallest implemented translation granule that contains the virtual address of an access or set of contiguous accesses that triggered the Watchpoint debug event. When FEAT_SME is implemented or FEAT_SVE is implemented AU 14 14 14 Reserved, RES0. VNCR 13 13 0 VNCR_EL2 access. Indicates that the Watchpoint debug event came from use of VNCR_EL2 register by EL1 code. 0b0 The Watchpoint debug event was not generated by the use of VNCR_EL2 by EL1 code. 0b1 The Watchpoint debug event was generated by the use of VNCR_EL2 by EL1 code. When FEAT_NV2 is implemented AU When FEAT_Debugv8p9 is implemented 13 13 13 Reserved, RES0. Otherwise 12 11 12:11 Reserved, RES0. FnV 10 10 10 EDWAR not Valid. 0b0 EDWAR is valid. 0b1 EDWAR is not valid, and holds an UNKNOWN value. When FEAT_SME is implemented or FEAT_SVE is implemented AU 9 9 9 Reserved, RES0. CM 8 8 0 Cache maintenance. Indicates whether the Watchpoint debug event came from a cache maintenance instruction. 0b0 The Watchpoint debug event was not generated by the execution of one of the System instructions identified in the description of value 1. 0b1 The Watchpoint debug event was generated by the execution of a cache maintenance instruction. The DC ZVA, DC GVA, and DC GZVA instructions are not cache maintenance instructions, and therefore do not cause this field to be set to 1. AU When FEAT_Debugv8p9 is implemented 8 8 8 Reserved, RES0. Otherwise 7 7 7 Reserved, RES0. WnR 6 6 0 Write not Read. Indicates whether the Watchpoint debug event was caused by an instruction writing to a memory location, or by an instruction reading from a memory location. For Watchpoint debug events on cache maintenance instructions, this field is set to 1. For Watchpoint debug events from an atomic instruction, this field is set to 0 if a read of the location would have generated the Watchpoint debug event, otherwise it is set to 1. If multiple watchpoints match on the same access, it is UNPREDICTABLE which watchpoint generates the Watchpoint debug event. 0b0 Watchpoint debug event caused by an instruction reading from a memory location. 0b1 Watchpoint debug event caused by an instruction writing to a memory location. AU When FEAT_Debugv8p9 is implemented 6 6 6 Reserved, RES0. Otherwise 5 0 5:0 Reserved, RES0. 2026-03-26 20:27:25 2026-03_rel