EDLAR External Debug Lock Access Register When FEAT_DoPD is implemented, EDLAR is in the Core power domain. Otherwise, EDLAR is in the Debug power domain Debug 0xFB0 EDLAR When FEAT_DoPD is implemented and !IsCorePowered() ERROR WO Allows or disallows access to the external debug registers through a memory-mapped interface. The optional Software Lock provides a lock to prevent memory-mapped writes to the debug registers. Use of this lock mechanism reduces the risk of accidental damage to the contents of the debug registers. It does not, and cannot, prevent all accidental or malicious damage. Debug If FEAT_DoPD is implemented, Software Lock is not implemented by the architecturally-defined debug components of the PE. Software uses EDLAR to set or clear the lock, and EDLSR to check the current status of the lock. EDLAR is a 32-bit register. When Debug Software Lock is implemented KEY 31 0 31:0 Lock Access control. Writing the key value 0xC5ACCE55 to this field unlocks the lock, enabling write accesses to this component's registers through a memory-mapped interface. Writing any other value to this register locks the lock, disabling write accesses to this component's registers through a memory mapped interface. Otherwise Otherwise 31 0 31:0 Reserved, RES0. When Debug Software Lock is implemented 2026-03-26 20:27:25 2026-03_rel