ERRDEVID Device Configuration Register RAS 0xFC8 ERRDEVID RO Provides discovery information for the component. RAS ERRDEVID is implemented only as part of a memory-mapped group of error records. ERRDEVID is a 32-bit register. 31 22 31:22 Reserved, RES0. PFG 21 21 0 Common Fault Injection Mechanism. Describes whether any Common Fault Injection Mechanism registers are implemented in the same page as this register. The value of this field does not indicate that any Common Fault Injection Mechanism registers are implemented by the nodes in this error record group. Software must use ERR<n>FR to discover whether each node implements Common Fault Injection Mechanism registers. 0b0 Any Common Fault Injection Mechanism registers are implemented in the same page as this register. 0b1 Any Common Fault Injection Mechanism registers are implemented in a separate fault injection group page. When ERRDEVID is part of a fault injection group RAZ/WI RO When RAS System Architecture v2 is implemented 21 21 21 Reserved, RAZ. Otherwise 20 20 20 Reserved, RES0. IRQCR 19 16 19:16 Interrupt configuration registers. Describes whether the interrupt configuration registers are implemented. All other values are reserved. 0b0000 It is IMPLEMENTATION DEFINED whether any interrupt configuration registers are implemented. 0b0001 An IMPLEMENTATION DEFINED form of interrupt configuration registers are implemented. 0b0010 The recommended layout form of interrupt configuration registers are implemented, for simple interrupts. 0b0011 The recommended layout form of interrupt configuration registers are implemented, for message-signaled interrupts. 0b1111 Interrupt configuration registers are not implemented. When ERRDEVID is part of a fault injection group RAZ/WI RO NUM 15 0 15:0 Highest numbered index of the error records in this group, plus one. Each implemented record is owned by a node. A node might own multiple records. This manual describes a group of error records accessed via a standard 4KB memory-mapped peripheral. For a 4KB peripheral, up to 24 error records can be accessed if the Common Fault Injection Model is implemented, and up to 56 otherwise. This field has an IMPLEMENTATION DEFINED value. RO This section shows the offset of ERRDEVID when FEAT_RASSA_4KB_GRP is implemented. If FEAT_RASSA_16KB_GRP or FEAT_RASSA_64KB_GRP is implemented, see 'RAS memory-mapped register views' for the offset of ERRDEVID. 2026-03-26 20:27:25 2026-03_rel