ERRGSR<m> Error Group <m> Status Register when FEAT_RASSAv1 is implemented 0 13 RAS 0xE00 + (64 * m) ERRGSR<m> RO Shows the status for the records in the group. RAS ERRGSR is implemented only as part of a memory-mapped group of error records. If FEAT_RASSA_4KB_GRP is implemented, then a single ERRGSR register is implemented. ERRGSR<m> is a 64-bit register. S<n> 63 0 63:0 If FEAT_RASSA_4KB_GRP is implemented, the status for error record <n>. A read-only copy of ERR<n>STATUS.V. If FEAT_RASSA_16KB_GRP is implemented or FEAT_RASSA_64KB_GRP is implemented, the status for error record <m×64+n>. A read-only copy of ERR<m×64+n>STATUS.V. 63 0 0b0 No error. 0b1 One or more errors. FEAT_RASSA_4KB_GRP is implemented n >= 56 RES0 FEAT_RASSA_4KB_GRP is implemented the Common Fault Injection Model is implemented by any error record in the group n >= 24 RES0 FEAT_RASSA_4KB_GRP is implemented error record n is not implemented RAZ/WI FEAT_RASSA_16KB_GRP is implemented or FEAT_RASSA_64KB_GRP is implemented error record (m * 64) + n is not implemented RAZ/WI RAS System Architecture v2 is not implemented error record n does not support this type of reporting RAZ/WI RO This section shows the offset of ERRGSR when FEAT_RASSA_4KB_GRP is implemented. If FEAT_RASSA_16KB_GRP or FEAT_RASSA_64KB_GRP is implemented, see 'RAS memory-mapped register views' for the offset of ERRGSR<n>. 2026-03-26 20:27:25 2026-03_rel