GICR_NSACR Non-secure Access Control Register GIC Redistributor SGI_base 0x0E00 GICR_NSACR When GICD_CTLR.DS == '1' RAZ/WI When GICD_CTLR.DS == '0' and an access is Secure RW When GICD_CTLR.DS == '0' and an access is Non-secure RAZ/WI When GICD_CTLR.DS == '0', FEAT_RME is implemented, and an access is Root RW When GICD_CTLR.DS == '0', FEAT_RME is implemented, and an access is Realm RAZ/WI Enables Secure software to permit Non-secure software to create SGIs targeting the PE connected to this Redistributor by writing to ICC_SGI1R_EL1, ICC_ASGI1R_EL1 or ICC_SGI0R_EL1. For more information, see 'Forwarding an SGI to a target PE' in ARM® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0 (ARM IHI 0069). GICR For a description on when a write to ICC_SGI0R_EL1, ICC_SGI1R_EL1 or ICC_ASGI1R_EL1 is permitted to generate an interrupt, see 'Use of control registers for SGI forwarding' in ARM® Generic Interrupt Controller Architecture Specification, GIC architecture version 3.0 and version 4.0 (ARM IHI 0069). GICR_NSACR is a 32-bit register. NS_access<x> 31 0 31:0 Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1, as defined from GICR_IGROUPR0 and GICR_IGRPMODR0. A field is provided for each SGI. The possible values of each 2-bit field are: 15 0 0b00 Non-secure writes are not permitted to generate Secure Group 0 SGIs or Secure Group 1 SGIs. 0b01 Non-secure writes are permitted to generate a Secure Group 0 SGI. 0b10 As 0b01, but additionally Non-secure writes to are permitted to generate a Secure Group 1 SGI. 0b11 Reserved. If the field is programmed to the reserved value, then the hardware will treat the field as if it has been programmed to an IMPLEMENTATION DEFINED choice of the valid values. However, to maintain the principle that as the value increases additional accesses are permitted Arm strongly recommends that implementations treat this value as 0b10. It is IMPLEMENTATION DEFINED whether the value read back is the value programmed or the valid value chosen. AU This register is used when affinity routing is enabled. When affinity routing is not enabled for the Security state of the interrupt, GICD_NSACR<n> with n=0 provides equivalent functionality. This register does not support PPIs. 2026-03-26 20:27:25 2026-03_rel