GICR_VPROPBASER Virtual Redistributor Properties Base Address Register when GICv4 is implemented or GICv4.1 is implemented GIC Redistributor VLPI_base 0x0070 GICR_VPROPBASER RW In GICv4.0, specifies the base address of the memory that holds the virtual LPI Configuration table for the currently scheduled virtual machine. In GICv4.1, specifies the base address of the memory that holds the vPE Configuration table. GICR GICR_VPROPBASER is a 64-bit register. When GICv4.1 is implemented Valid 63 63 63 This bit controls whether the vPE Configuration Table is valid. 0b0 The vPE Configuration table is not valid. 0b1 The vPE Configuration table is valid. '0' 62 62 62 Reserved, RES0. Entry_Size 61 59 61:59 Specifies the number 64-bit doublewords per table entry, minus one. This bit is read-only. OuterCache 58 56 58:56 Indicates the Outer Cacheability attributes of accesses to the table. It is IMPLEMENTATION DEFINED whether this field has a fixed value or can be programmed by software. Implementing this field with a fixed value is deprecated. 0b000 Memory type defined in InnerCache field. For Normal memory, Outer Cacheability is the same as Inner Cacheability. 0b001 Normal Outer Non-cacheable. 0b010 Normal Outer Cacheable Read-allocate, Write-through. 0b011 Normal Outer Cacheable Read-allocate, Write-back. 0b100 Normal Outer Cacheable Write-allocate, Write-through. 0b101 Normal Outer Cacheable Write-allocate, Write-back. 0b110 Normal Outer Cacheable Read-allocate, Write-allocate, Write-through. 0b111 Normal Outer Cacheable Read-allocate, Write-allocate, Write-back. U Indirect 55 55 55 This field indicates whether GICR_VPROPBASER specifies a single, flat table or a two-level table where the first level contains a list of descriptors. This field is RAZ/WI for GIC implementations that only support flat tables. If the supported vPEID width indicated by GICD_TYPER2.VIL and GICD_TYPER2.VID, and the smallest page size that is supported result in a single level table that requires multiple pages, then implementing this bit as RAZ/WI is deprecated. 0b0 Single Level. The Size field indicates the number of pages used to store data associated with each table entry. 0b1 Two Level. The Size field indicates the number of pages that contain an array of 64-bit descriptors to pages that are used to store the data associated with each table entry. A little endian memory order model is used. U Page_Size 54 53 54:53 The following values indicate the size of page that the translation table uses: If the GIC implementation supports only a single, fixed page size, this field might be RO. 0b00 4KB. 0b01 16KB. 0b10 64KB. 0b11 Reserved. Treated as 0b10. U Z 52 52 52 When GICR_VPROPBASER.Valid is written from 0 to 1, GICR_VPROPBASER.Z indicates whether the vPE Configuration table is known to contain all zeros. Setting GICR_VPROPBASER.Z to 0 causes the IRI to reload configuration from memory When GICR_VPROPBASER.Valid is written from 0 to 1, if GICR_VPROPBASER.Z==1 behavior is UNPREDICTABLE if the allocated memory does not contain all zeros. This field is WO, and reads as 0. 0b0 The vPE Configuration table is not zero, and contains live data. 0b1 The vPE Configuration table is zero. Physical_Address 51 12 51:12 Bits [51:12] of the physical address containing the vPE Configuration table. In implementations supporting fewer than 52 bits of physical address, unimplemented upper bits are RES0. U Shareability 11 10 11:10 Indicates the Shareability attributes of accesses to the vPE Configuration table. It is IMPLEMENTATION DEFINED whether this field has a fixed value or can be programmed by software. Implementing this field with a fixed value is deprecated. 0b00 Non-shareable. 0b01 Inner Shareable. 0b10 Outer Shareable. 0b11 Reserved. Treated as 0b00. U InnerCache 9 7 9:7 Indicates the Inner Cacheability attributes of accesses to the vPE Configuration table. 0b000 Device-nGnRnE. 0b001 Normal Inner Non-cacheable. 0b010 Normal Inner Cacheable Read-allocate, Write-through. 0b011 Normal Inner Cacheable Read-allocate, Write-back. 0b100 Normal Inner Cacheable Write-allocate, Write-through. 0b101 Normal Inner Cacheable Write-allocate, Write-back. 0b110 Normal Inner Cacheable Read-allocate, Write-allocate, Write-through. 0b111 Normal Inner Cacheable Read-allocate, Write-allocate, Write-back. U Size 6 0 6:0 The number of pages of physical memory allocated to the table, minus one. GICR_VPROPBASER.Page_Size specifies the size of each page. U When GICv4 is implemented 63 59 63:59 Reserved, RES0. OuterCache 58 56 58:56 Indicates the Outer Cacheability attributes of accesses to the LPI Configuration table. It is IMPLEMENTATION DEFINED whether this field has a fixed value or can be programmed by software. Implementing this field with a fixed value is deprecated. 0b000 Memory type defined in InnerCache field. For Normal memory, Outer Cacheability is the same as Inner Cacheability. 0b001 Normal Outer Non-cacheable. 0b010 Normal Outer Cacheable Read-allocate, Write-through. 0b011 Normal Outer Cacheable Read-allocate, Write-back. 0b100 Normal Outer Cacheable Write-allocate, Write-through. 0b101 Normal Outer Cacheable Write-allocate, Write-back. 0b110 Normal Outer Cacheable Read-allocate, Write-allocate, Write-through. 0b111 Normal Outer Cacheable Read-allocate, Write-allocate, Write-back. AU 55 52 55:52 Reserved, RES0. Physical_Address 51 12 51:12 Bits [51:12] of the physical address containing the virtual LPI Configuration table. In implementations supporting fewer than 52 bits of physical address, unimplemented upper bits are RES0. AU Shareability 11 10 11:10 Indicates the Shareability attributes of accesses to the vPE Configuration table. It is IMPLEMENTATION DEFINED whether this field has a fixed value or can be programmed by software. Implementing this field with a fixed value is deprecated. 0b00 Non-shareable. 0b01 Inner Shareable. 0b10 Outer Shareable. 0b11 Reserved. Treated as 0b00. AU InnerCache 9 7 9:7 Indicates the Inner Cacheability attributes of accesses to the vPE Configuration table. 0b000 Device-nGnRnE. 0b001 Normal Inner Non-cacheable. 0b010 Normal Inner Cacheable Read-allocate, Write-through. 0b011 Normal Inner Cacheable Read-allocate, Write-back. 0b100 Normal Inner Cacheable Write-allocate, Write-through. 0b101 Normal Inner Cacheable Write-allocate, Write-back. 0b110 Normal Inner Cacheable Read-allocate, Write-allocate, Write-through. 0b111 Normal Inner Cacheable Read-allocate, Write-allocate, Write-back. AU 6 5 6:5 Reserved, RES0. IDbits 4 0 4:0 The number of bits of virtual LPI INTID supported, minus one. If the value of this field is less than 0b1101, indicating that the largest INTID is less than 8192 (the smallest LPI interrupt ID), the GIC will behave as if all virtual LPIs are out of range. AU When GICv4.1 is implemented When GICv4 is implemented 2026-03-26 20:27:25 2026-03_rel