MPAMF_AIDR
MPAM Architecture Identification Register
The power domain of MPAMF_AIDR is IMPLEMENTATION DEFINED
when FEAT_MPAMv1p0 is implemented or FEAT_MPAMv0p1 is implemented
MPAM
MPAMF_BASE_s
0x0020
MPAMF_AIDR_s
When FEAT_MPAMv1p0 is implemented or FEAT_MPAMv0p1 is implemented
RO
MPAM
MPAMF_BASE_ns
0x0020
MPAMF_AIDR_ns
When FEAT_MPAMv1p0 is implemented or FEAT_MPAMv0p1 is implemented
RO
MPAM
MPAMF_BASE_rt
0x0020
MPAMF_AIDR_rt
When FEAT_RME is implemented and (FEAT_MPAMv1p0 is implemented or FEAT_MPAMv0p1 is implemented)
RO
MPAM
MPAMF_BASE_rl
0x0020
MPAMF_AIDR_rl
When FEAT_RME is implemented and (FEAT_MPAMv1p0 is implemented or FEAT_MPAMv0p1 is implemented)
RO
Identifies the version of the MPAM architecture that this MSC implements.
MPAM
The power and reset domain of each MSC component is specific to that component.
MPAMF_AIDR is a 32-bit register.
31
8
31:8
Reserved, RES0.
ArchMajorRev
7
4
7:4
Major revision of the MPAM architecture implemented by the MSC.
This table shows the only valid combinations of MPAM version numbers in an MSC. FORCE_NS functionality is only available in MPAM v0.1.
ArchMajorRevArchMinorRevMPAMvAvailable
00None.
01v0.1MPAMv1.0 + MPAMv1.1 + FORCE_NS
10v1.0MPAMv1.0
11v1.1MPAMv1.0 + MPAMv1.1 - FORCE_NS
Use of MPAMv0.1 in MSCs is restricted to limited circumstances. The MSC must be able to initiate requests in the Secure address space which have MPAM PARTID forced to the Non-secure space with that forcing not controllable or observable by the software that configures the device for Secure requests. Please contact Arm before setting MPAMF_AIDR to report MPAMv0.1.
This field has an IMPLEMENTATION DEFINED value.
RO
ArchMinorRev
3
0
3:0
Minor revision of the MPAM architecture implemented by the MSC.
See the table in the description of the ArchMajorRev field in this register.
This field has an IMPLEMENTATION DEFINED value.
RO
This register is within the MPAM feature page memory frames.
If FEAT_MPAM is implemented, the following statements apply:
In a system that supports Secure and Non-secure memory maps, there must be both Secure and Non-secure MPAM feature pages.
MPAMF_AIDR must be readable from the Non-secure and Secure MPAM feature pages.
MPAMF_AIDR must have the same contents in the Secure and Non-secure MPAM feature pages.
If both FEAT_MPAM and FEAT_RME are implemented, the following statements apply:
In a system that supports Secure, Non-secure, Root, and Realm memory maps, there must be MPAM feature pages in all four address maps.
MPAMF_AIDR must be readable from the Secure, Non-secure, Root, and Realm MPAM feature pages.
MPAMF_AIDR must have the same contents in the Secure, Non-secure, Root, and Realm MPAM feature pages.
2026-03-26 20:27:25
2026-03_rel