TRBBASER_EL1 Trace Buffer Base Address Register TRBBASER_EL1 is in the Core power domain when FEAT_TRBE_EXT is implemented TRBE 0x000 TRBBASER_EL1 When DoubleLockStatus(), or !IsCorePowered(), or OSLockStatus(), or !AllowExternalTraceBufferAccess(addrdesc) ERROR RW TRBBASER_EL1 Architectural AArch64 63 0 63 0 63 0 63 0 Defines the base address for the trace buffer. TRBE TRBBASER_EL1 is a 64-bit register. BASE 63 12 63:12 Trace Buffer Base pointer address. (TRBBASER_EL1.BASE << 12) is the address of the first byte in the trace buffer. Bits [11:0] of the Base pointer address are always zero. If the smallest implemented translation granule is not 4KB, then TRBBASER_EL1[N-1:12] are RES0, where N is the IMPLEMENTATION DEFINED value Log₂(smallest implemented translation granule). AU 11 0 11:0 Reserved, RES0. The PE might ignore a write to TRBBASER_EL1 if any of the following apply: TRBLIMITR_EL1.E is 1 and the Trace Buffer Unit is using Self-hosted mode. TRBLIMITR_EL1.XE is 1 and the Trace Buffer Unit is using External mode. 2026-03-26 20:27:25 2026-03_rel