TRBCR Trace Buffer Control Register TRBCR is in the Core power domain when FEAT_TRBE_EXT is implemented TRBE 0x038 TRBCR When DoubleLockStatus(), or !IsCorePowered(), or OSLockStatus(), or !AllowExternalTraceBufferAccess(addrdesc) ERROR RW Provides trace buffer controls for an external debugger. TRBE TRBCR is a 64-bit register. 63 1 63:1 Reserved, RES0. ManStop 0 0 0 Flush and Stop collection. A write of 1 to this field causes a trace buffer flush, and on completion of the flush, Collection is stopped and the Trace Buffer Unit writes all trace data it has Accepted from the trace unit to memory, adding padding data if necessary. WO/RAZ 2026-03-26 20:27:25 2026-03_rel