TRBPIDR7 Peripheral Identification Register 7 TRBPIDR7 is in the Core power domain when FEAT_TRBE_EXT is implemented TRBE 0xFDC TRBPIDR7 When DoubleLockStatus() or !IsCorePowered() ERROR RO Provides discovery information about the component. For additional information, see the CoreSight Architecture Specification. TRBE TRBPIDR7 is a 32-bit register. 31 0 31:0 Reserved, RES0. 2026-03-26 20:27:25 2026-03_rel