TRCCONFIGR Trace Configuration Register when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented ETE 0x010 TRCCONFIGR When OSLockStatus(), or !IsTraceCorePowered(), or !AllowExternalTraceAccess(addrdesc) ERROR RW TRCCONFIGR Architectural AArch64 31 0 31 0 31 0 31 0 Controls the tracing options. Trace TRCCONFIGR is a 32-bit register. 31 19 31:19 Reserved, RES0. ITO 18 18 0 Instrumentation Trace Override. This field is ignored when SelfHostedTraceEnabled() returns TRUE. 0b0 Instrumentation Trace Override disabled. 0b1 Instrumentation Trace Override enabled. AU When TRCIDR0.ITE == '1' 18 18 18 Reserved, RES0. Otherwise 17 16 17:16 Reserved, RES0. VMIDOPT 15 15 0 Virtual context identifier selection control. 0b0 VTTBR_EL2.VMID is used as the Virtual context identifier. 0b1 CONTEXTIDR_EL2.PROCID is used as the Virtual context identifier. When TRCIDR2.VMIDOPT == '01' 15 15 0 Reserved, RES0. Virtual context identifier selection control. VTTBR_EL2.VMID is used as the Virtual context identifier. When TRCIDR2.VMIDOPT == '00' 15 15 0 Reserved, RES1. Virtual context identifier selection control. CONTEXTIDR_EL2.PROCID is used as the Virtual context identifier. When TRCIDR2.VMIDOPT == '10' 15 15 15 Reserved, RES0. Otherwise QE 14 13 1:0 Q element generation control. All other values are reserved. 0b00 Q elements are disabled. 0b01 Q elements with instruction counts are enabled. Q elements without instruction counts are disabled. When TRCIDR0.QSUPP == '01' QE 14 13 1:0 Q element generation control. All other values are reserved. 0b00 Q elements are disabled. 0b11 Q elements with instruction counts are enabled. Q elements without instruction counts are enabled. When TRCIDR0.QSUPP == '10' QE 14 13 1:0 Q element generation control. All other values are reserved. 0b00 Q elements are disabled. 0b01 Q elements with instruction counts are enabled. Q elements without instruction counts are disabled. 0b11 Q elements with instruction counts are enabled. Q elements without instruction counts are enabled. When TRCIDR0.QSUPP == '11' 14 13 14:13 Reserved, RES0. Otherwise RS 12 12 0 Return stack control. 0b0 Return stack is disabled. 0b1 Return stack is enabled. AU When TRCIDR0.RETSTACK == '1' 12 12 12 Reserved, RES0. Otherwise TS 11 11 0 Global timestamp tracing control. 0b0 Global timestamp tracing is disabled. 0b1 Global timestamp tracing is enabled. AU When TRCIDR0.TSSIZE != '00000' 11 11 11 Reserved, RES0. Otherwise 10 8 10:8 Reserved, RES0. VMID 7 7 0 Virtual context identifier tracing control. 0b0 Virtual context identifier tracing is disabled. 0b1 Virtual context identifier tracing is enabled. AU When TRCIDR2.VMIDSIZE != '00000' 7 7 7 Reserved, RES0. Otherwise CID 6 6 0 Context identifier tracing control. 0b0 Context identifier tracing is disabled. 0b1 Context identifier tracing is enabled. AU When TRCIDR2.CIDSIZE != '00000' 6 6 6 Reserved, RES0. Otherwise 5 5 5 Reserved, RES0. CCI 4 4 0 Cycle counting instruction tracing control. 0b0 Cycle counting instruction tracing is disabled. 0b1 Cycle counting instruction tracing is enabled. AU When TRCIDR0.TRCCCI == '1' 4 4 4 Reserved, RES0. Otherwise BB 3 3 0 Branch broadcasting control. 0b0 Branch broadcasting is disabled. 0b1 Branch broadcasting is enabled. AU When TRCIDR0.TRCBB == '1' 3 3 3 Reserved, RES0. Otherwise 2 1 2:1 Reserved, RES0. 0 0 0 Reserved, RES1. Must always be programmed. TRCCONFIGR.QE must be set to 0b00 if TRCCONFIGR.BB is not 0. Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state. 2026-03-26 20:27:25 2026-03_rel