<?xml version='1.0' encoding='utf-8'?>
<!DOCTYPE register_page SYSTEM "registers.dtd">
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<?xml-stylesheet href="one_register.xsl" type="text/xsl" ?>







<register_page>
  <registers>
  
    <register is_register="True" is_internal="False" is_stub_entry="False">
      <reg_short_name>TRCPIDR4</reg_short_name>
        
        <reg_long_name>Trace Peripheral Identification Register 4</reg_long_name>



      
            <reg_condition otherwise="RES0">when FEAT_ETE is implemented and FEAT_TRC_EXT is implemented</reg_condition>
      

    
  <reg_address
      external_access="True"
    mem_map_access="True"
      power_domain="None"
  >
    <reg_component>ETE</reg_component>
    <reg_offset><hexnumber>0xFD0</hexnumber></reg_offset>
    <reg_instance>TRCPIDR4</reg_instance>
    <reg_access>
      
        
      <reg_access_state>
          <reg_access_level>When !IsTraceCorePowered()</reg_access_level>
          <reg_access_type>ERROR</reg_access_type>
      </reg_access_state>
        
      <reg_access_state>
          <reg_access_type>RO</reg_access_type>
      </reg_access_state>
    </reg_access>
</reg_address>



          <reg_reset_value></reg_reset_value>

      <reg_mappings>
        




      </reg_mappings>

        <reg_purpose>
          
    
      <purpose_text>
        <para>Provides discovery information about the component.</para>

      </purpose_text>
      <purpose_text>
        <para>For additional information, see the CoreSight Architecture Specification.</para>
      </purpose_text>

        </reg_purpose>

      <reg_groups>
            <reg_group>Trace Management</reg_group>
      </reg_groups>
      
      
        
      <reg_attributes>
          
    
      <attributes_text>
        <para>TRCPIDR4 is a 32-bit register.</para>
      </attributes_text>

      </reg_attributes>
      <reg_fieldsets>
        






<fields id="fieldset_0" length="32">
  <text_before_fields/>
  <field id="fieldset_0-31_8" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="False" is_partial_field="False" is_conditional_field_name="False" rwtype="RES0">
    <field_msb>31</field_msb>
    <field_lsb>8</field_lsb>
    <rel_range>31:8</rel_range>
    <field_description order="before"/>
    <field_description order="before">
      <para>Reserved, <arm-defined-word>RES0</arm-defined-word>.</para>
    </field_description>
  </field>
  <field id="fieldset_0-7_4" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>SIZE</field_name>
    <field_msb>7</field_msb>
    <field_lsb>4</field_lsb>
    <rel_range>7:4</rel_range>
    <field_description order="before">
      <para>Size of the component.</para>
    </field_description>
    <field_description order="after"><para>Using this field to indicate the size of the component is deprecated. This field might not correctly indicate the size of the component. Arm recommends that software determine the size of the component from the Unique Component Identifier fields, and other <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> registers in the component.</para>
<para>This field has the value <binarynumber>0b0000</binarynumber>.</para></field_description>
    <field_values impdef="True">
      <field_value_instance>
        <field_value>0b0000</field_value>
        <field_value_description><para>One of the following is true:</para>
<list type="unordered">
<listitem><content>The component uses a single 4KB block.</content>
</listitem><listitem><content>The component uses an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> number of 4KB blocks.</content>
</listitem></list></field_value_description>
      </field_value_instance>
      <field_value_instance>
        <field_value>0b0001..0b1111</field_value>
        <field_value_description>
          <para>The component occupies 2<sup><register_link state="ext" id="ext-trcpidr4.xml">TRCPIDR4</register_link>.SIZE</sup> 4KB blocks.</para>
        </field_value_description>
      </field_value_instance>
    </field_values>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <field id="fieldset_0-3_0" has_partial_fieldset="False" is_linked_to_partial_fieldset="False" is_access_restriction_possible="False" is_variable_length="False" is_constant_value="True" is_partial_field="False" is_conditional_field_name="False">
    <field_name>DES_2</field_name>
    <field_msb>3</field_msb>
    <field_lsb>0</field_lsb>
    <rel_range>3:0</rel_range>
    <field_description order="before"><para>Designer, JEP106 continuation code.</para>
<para>The JEP106 identification and continuation codes are stored as follows:</para>
<list type="unordered">
<listitem><content><register_link state="ext" id="ext-trcpidr1.xml">TRCPIDR1</register_link>.DES_0: JEP106 identification code bits[3:0].</content>
</listitem><listitem><content><register_link state="ext" id="ext-trcpidr2.xml">TRCPIDR2</register_link>.DES_1: JEP106 identification code bits[6:4].</content>
</listitem><listitem><content><register_link state="ext" id="ext-trcpidr4.xml">TRCPIDR4</register_link>.DES_2: JEP106 continuation code.</content>
</listitem></list>
<para>These codes indicate the designer of the component and not the implementer, except where the two are the same. To obtain a number, or to see the assignment of these codes, contact JEDEC http://www.jedec.org.</para>
<para>A JEP106 identification and continuation code takes the following form:</para>
<list type="unordered">
<listitem><content>A sequence of zero or more numbers, all having the value <hexnumber>0x7F</hexnumber>.</content>
</listitem><listitem><content>A following 8-bit number, that is not <hexnumber>0x7F</hexnumber>, and where bit[7] is an odd parity bit.</content>
</listitem></list>
<para>The parity bit in the JEP106 identification code is not included.</para></field_description>
    <field_description order="after">
      <note>
        <para>For example, Arm Limited is assigned the code <hexnumber>0x7F</hexnumber> <hexnumber>0x7F</hexnumber> <hexnumber>0x7F</hexnumber> <hexnumber>0x7F</hexnumber> <hexnumber>0x3B</hexnumber>.</para>
        <list type="unordered">
          <listitem>
            <content>The continuation code is the number of times <hexnumber>0x7F</hexnumber> appears before the final number. For example, a component designed by Arm Limited has the code <hexnumber>0x4</hexnumber>.</content>
          </listitem>
          <listitem>
            <content>The identification code is bits[6:0] of the final number. For example, a component designed by Arm Limited has the code <hexnumber>0x3B</hexnumber>.</content>
          </listitem>
        </list>
      </note>
      <para>This field has an <arm-defined-word>IMPLEMENTATION DEFINED</arm-defined-word> value.</para>
    </field_description>
    <field_access>
      <field_access_state>
        <field_access_type>RO</field_access_type>
      </field_access_state>
    </field_access>
  </field>
  <text_after_fields/>
</fields>




<reg_fieldset length="32">
  <fieldat id="fieldset_0-31_8" msb="31" lsb="8"/>
  <fieldat id="fieldset_0-7_4" msb="7" lsb="4"/>
  <fieldat id="fieldset_0-3_0" msb="3" lsb="0"/>
</reg_fieldset>


      </reg_fieldsets>

      <access_mechanisms>
          


  
    
      <access_permission_text>
        <para>External debugger accesses to this register are unaffected by the OS Lock.</para>
      </access_permission_text>





    

      </access_mechanisms>

      <arch_variants>
      </arch_variants>
  </register>
</registers>
<timestamp>2026-03-26 20:27:25</timestamp>
<commit_id>2026-03_rel</commit_id>
</register_page>