PMSSCR_EL1 Performance Monitors Snapshot Status and Capture Register PMU when FEAT_PMUv3_SS is implemented and FEAT_PMUv3_EXT is implemented PMU 0xE30 When DoubleLockStatus(), or !IsCorePowered(), or !AllowExternalPMSSAccess(addrdesc) ERROR RW PMSSCR_EL1 Architectural AArch64 63 0 63 0 63 0 63 0 Holds status information about the captured counters and provides a mechanism for software to initiate a sample. PMU PMSSCR_EL1 is a 64-bit register. 63 33 63:33 Reserved, RES0. NC 32 32 32 No Capture. Indicates whether the PMU counters have been captured. 0b0 PMU counters captured. 0b1 PMU counters not captured. '1' 31 1 31:1 Reserved, RES0. SS 0 0 0 Snapshot Capture and Status. A write of 0 to this field is ignored. It is CONSTRAINED UNPREDICTABLE whether a Capture event has completed if this field is modified when the Capture event is ongoing. 0b0 On a read, the Capture event has completed. 0b1 On a read, the Capture event has not completed. On a write, request a Capture event. '0' When SoftwareLockStatus(addrdesc) RO When PMU capture events are disabled RO RW Accessible at offset 0xE30 from PMU 2026-03-26 20:27:25 2026-03_rel