243291: AP-578: Software and Hardware Considerations for FPU Exception Handlers for Intel Architecture Processors
244422: Write Combining Memory Implementation Guidelines
30388: Performance Monitoring Unit Sharing Guide
317080: TLBs, Paging-Structure Caches, and Their Invalidation
318147: Intel 64 Architecture Memory Ordering White Paper
320631: Removing System Bottlenecks in Multi-threaded Applications
323102: Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction
323640: Intel Carry-Less Multiplication Instruction and its Usage for Computing the GCM Mode
323641: Intel Advanced Encryption Standard (AES) New Instructions Set
323850: Intel Virtualization Technology FlexMigration Application Note
329176: MCA [Machine Check Architecture] Enhancements in Intel Xeon Processors
331872: Page Modification Logging for Virtual Machine Monitor White Paper
333159: Timestamp-Counter Scaling for Virtualization White Paper
334467: Secure Access of Performance Monitoring Unit by User Space Profilers
336983: Intel Analysis of Speculative Execution Side Channels
336996: Speculative Execution Side Channel Mitigations
337015: Intel 64 Architecture Processor Topology Enumeration
337313: Managed Runtime Speculative Execution Side Channel Mitigations
337879: Analyzing potential bounds check bypass vulnerabilities
338302: BFLOAT16 Hardware Numerics Definition
341810: Mitigations for Jump Conditional Code Erratum
402097: Intel SHA Extensions - New Instructions Supporting the Secure Hash Algorithm on Intel Architecture Processors
644497: Technology Guide: Galois Field New Instructions