<?xml version="1.0" ?><?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?><!DOCTYPE instructionsection  PUBLIC '-//ARM//DTD instructionsection //EN'  'iform-p.dtd'><!-- Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. --><!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. --><instructionsection id="GCSPOPM_SYSL" title="GCSPOPM -- A64" type="alias">
  <docvars>
    <docvar key="alias_mnemonic" value="GCSPOPM"/>
    <docvar key="instr-class" value="system"/>
    <docvar key="isa" value="A64"/>
    <docvar key="mnemonic" value="SYSL"/>
  </docvars>
  <heading>GCSPOPM</heading>
  <desc>
    <brief>
      <para>Guarded Control Stack pop</para>
    </brief>
    <authored>
      <para>This instruction loads the 64-bit doubleword that is pointed to
by the current GCS pointer register, writes it to the destination
register, and increments the current GCS pointer register by
the size of a GCS procedure return record.</para>
      <para>For more information, see
<register_link id="AArch64-gcspopm.xml" state="AArch64">GCSPOPM, Guarded Control Stack Pop</register_link>.</para>
    </authored>
  </desc>
  <aliasto refiform="sysl.xml" iformid="SYSL">SYSL</aliasto>
  <classes>
    <iclass name="System" oneof="1" id="iclass_system" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="system"/>
        <docvar key="isa" value="A64"/>
        <docvar key="mnemonic" value="SYSL"/>
      </docvars>
      <iclassintro count="1"/>
      <arch_variants>
        <arch_variant feature="FEAT_GCS" name="v9Ap4"/>
      </arch_variants>
      <regdiagram form="32" psname="A64.control.systeminstrs.SYSL_RC_systeminstrs.GCSPOPM" tworows="1">
        <box hibit="31" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="28" width="3" settings="3">
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="25" width="4" settings="4">
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="21" name="L" usename="1" settings="1" psbits="x">
          <c>1</c>
        </box>
        <box hibit="20" width="2" settings="2">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="18" width="3" name="op1" usename="1" settings="3" psbits="xxx">
          <c>0</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="15" width="4" name="CRn" usename="1" settings="4" psbits="xxxx">
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="11" width="4" name="CRm" usename="1" settings="4" psbits="xxxx">
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
        </box>
        <box hibit="7" width="3" name="op2" usename="1" settings="3" psbits="xxx">
          <c>0</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1">
          <c colspan="5"/>
        </box>
      </regdiagram>
      <encoding name="GCSPOPM_SYSL_RC_systeminstrs" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="system"/>
          <docvar key="isa" value="A64"/>
          <docvar key="mnemonic" value="SYSL"/>
          <docvar key="alias_mnemonic" value="GCSPOPM"/>
        </docvars>
        <asmtemplate><text>GCSPOPM    {</text><a hover="Is the 64-bit name of the optional general-purpose destination register, encoded in the &quot;Rt&quot; field. Defaults to XZR if absent." link="optional_XtOrXZR_destination">&lt;Xt&gt;</a><text>}</text></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="sysl.xml#SYSL_RC_systeminstrs">SYSL</a><text>  </text><a hover="Is the 64-bit name of the general-purpose destination register, encoded in the &quot;Rt&quot; field." href="sysl.xml#XtOrXZR__4">&lt;Xt&gt;</a><text>, #3, C7, C7, #1</text></asmtemplate>
          <aliascond>Unconditionally</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="GCSPOPM_SYSL_RC_systeminstrs" symboldefcount="1">
      <symbol link="optional_XtOrXZR_destination">&lt;Xt&gt;</symbol>
      <account encodedin="Rt">
        <intro>
          <para>Is the 64-bit name of the optional general-purpose destination register, encoded in the &quot;Rt&quot; field. Defaults to XZR if absent.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <timestamp>2026-03-26 20:27:25</timestamp>
  <commit_id>2026-03_rel</commit_id>
</instructionsection>