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CNTVCTSS_EL0

CNTVCTSS_EL0, Counter-timer Self-Synchronized Virtual Count Register

The CNTVCTSS_EL0 characteristics are:

Purpose

Reads of CNTVCTSS_EL0 return the 64-bit physical count value minus a virtual offset.

Configuration

AArch64 System register CNTVCTSS_EL0 bits [63:0] are architecturally mapped to AArch32 System register CNTVCTSS[63:0].

This register is present only when FEAT_ECV is implemented and FEAT_AA64 is implemented. Otherwise, direct accesses to CNTVCTSS_EL0 are UNDEFINED.

All reads to the CNTVCTSS_EL0 occur in program order relative to reads to CNTVCT_EL0 or CNTVCTSS_EL0.

This register is a view of the CNTVCT_EL0 register for which reads appear to occur in program order relative to other instructions, without the need for any explicit synchronization. Reads of this register return a value consistent with the counter not being read until the read instruction is known to be non-speculative.

Attributes

CNTVCTSS_EL0 is a 64-bit register.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
SSVirtualCount
SSVirtualCount

SSVirtualCount, bits [63:0]

Self-synchronized virtual count value.

When EL2 is implemented, if the access is not trapped, and any of the following are true, then reads of CNTVCTSS_EL0 from EL0 and EL1 return (PhysicalCountInt<63:0> - CNTVOFF_EL2<63:0>):

Otherwise reads of CNTVCTSS_EL0 return PhysicalCountInt<63:0>.

PhysicalCountInt is defined by 'The Physical Counter'.

The reset behavior of this field is:

Accessing CNTVCTSS_EL0

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, CNTVCTSS_EL0

op0op1CRnCRmop2
0b110b0110b11100b00000b110

if !(IsFeatureImplemented(FEAT_ECV) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then if !ELIsInHost(EL0) && CNTKCTL_EL1().EL0VCTEN == '0' then if EL2Enabled() && HCR_EL2().TGE == '1' then AArch64_SystemAccessTrap(EL2, 0x18); else AArch64_SystemAccessTrap(EL1, 0x18); end; elsif ELIsInHost(EL0) && CNTHCTL_EL2().EL0VCTEN == '0' then AArch64_SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && !ELIsInHost(EL0) && CNTHCTL_EL2().EL1TVCT == '1' then AArch64_SystemAccessTrap(EL2, 0x18); else if HaveEL(EL2) && (!EL2Enabled() || !ELIsInHost(EL0)) then X{64}(t) = PhysicalCountInt() - CNTVOFF_EL2(); elsif HaveEL(EL2) && IsFeatureImplemented(FEAT_AA32EL2) && !ELUsingAArch32(EL2) && (!EL2Enabled() || !ELIsInHost(EL0)) then X{64}(t) = PhysicalCountInt() - CNTVOFF(); else X{64}(t) = PhysicalCountInt(); end; end; elsif PSTATE.EL == EL1 then if EL2Enabled() && CNTHCTL_EL2().EL1TVCT == '1' then AArch64_SystemAccessTrap(EL2, 0x18); else if HaveEL(EL2) then X{64}(t) = PhysicalCountInt() - CNTVOFF_EL2(); else X{64}(t) = PhysicalCountInt(); end; end; elsif PSTATE.EL == EL2 then if HaveEL(EL2) && !ELIsInHost(EL2) then X{64}(t) = PhysicalCountInt() - CNTVOFF_EL2(); else X{64}(t) = PhysicalCountInt(); end; elsif PSTATE.EL == EL3 then if HaveEL(EL2) && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) then X{64}(t) = PhysicalCountInt() - CNTVOFF_EL2(); elsif HaveEL(EL2) && IsFeatureImplemented(FEAT_AA32EL2) then X{64}(t) = PhysicalCountInt() - CNTVOFF(); else X{64}(t) = PhysicalCountInt(); end; end;


2026-03-12 12:23:09, 2025-09_rel_asl1

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