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CNTVCT
AArch32 Registers
AArch64 Registers
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CNTVCT, Counter-timer Virtual Count register

The CNTVCT characteristics are:

Purpose

Holds the 64-bit virtual count value. The virtual count value is equal to the physical count value minus the virtual offset visible in CNTVOFF.

Configuration

AArch32 System register CNTVCT bits [63:0] are architecturally mapped to AArch64 System register CNTVCT_EL0[63:0].

This register is present only when FEAT_AA32 is implemented. Otherwise, direct accesses to CNTVCT are UNDEFINED.

The value of this register is the same as the value of CNTPCT in the following conditions:

All reads to the CNTVCT occur in program order relative to reads to CNTVCTSS or CNTVCT.

Attributes

CNTVCT is a 64-bit register.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
VirtualCount
VirtualCount

VirtualCount, bits [63:0]

Virtual count value.

The reset behavior of this field is:

Accessing CNTVCT

Accesses to this register use the following encodings in the System register encoding space:

MRRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <Rt2>, <CRm>

coprocCRmopc1
0b11110b11100b0001

if !IsFeatureImplemented(FEAT_AA32) then Undefined(); elsif PSTATE.EL == EL0 then if IsFeatureImplemented(FEAT_AA64EL1) && !ELUsingAArch32(EL1) && !ELIsInHost(EL0) && CNTKCTL_EL1().EL0VCTEN == '0' then if EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); else AArch64_AArch32SystemAccessTrap(EL1, 0x04); end; elsif IsFeatureImplemented(FEAT_AA32EL1) && ELUsingAArch32(EL1) && CNTKCTL().PL0VCTEN == '0' then if EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && HCR_EL2().TGE == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2)) && HCR().TGE == '1' then AArch32_TakeHypTrapException(0x00); else Undefined(); end; elsif ELIsInHost(EL0) && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && CNTHCTL_EL2().EL0VCTEN == '0' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); elsif EL2Enabled() && (IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2)) && !ELIsInHost(EL0) && CNTHCTL_EL2().EL1TVCT == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); else if HaveEL(EL2) && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && (!EL2Enabled() || !ELIsInHost(EL0)) then R(t, t2) = PhysicalCountInt() - CNTVOFF_EL2(); elsif HaveEL(EL2) && IsFeatureImplemented(FEAT_AA32EL2) && !ELUsingAArch32(EL2) && (!EL2Enabled() || !ELIsInHost(EL0)) then R(t, t2) = PhysicalCountInt() - CNTVOFF(); elsif HaveEL(EL2) && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) then R(t, t2) = PhysicalCountInt() - CNTVOFF(); else R(t, t2) = PhysicalCountInt(); end; end; elsif PSTATE.EL == EL1 then if EL2Enabled() && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) && CNTHCTL_EL2().EL1TVCT == '1' then AArch64_AArch32SystemAccessTrap(EL2, 0x04); else if HaveEL(EL2) && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) then R(t, t2) = PhysicalCountInt() - CNTVOFF_EL2(); elsif HaveEL(EL2) && IsFeatureImplemented(FEAT_AA32EL2) && ELUsingAArch32(EL2) then R(t, t2) = PhysicalCountInt() - CNTVOFF(); else R(t, t2) = PhysicalCountInt(); end; end; elsif PSTATE.EL == EL2 then if HaveEL(EL2) then R(t, t2) = PhysicalCountInt() - CNTVOFF(); else R(t, t2) = PhysicalCountInt(); end; elsif PSTATE.EL == EL3 then if HaveEL(EL2) && IsFeatureImplemented(FEAT_AA64EL2) && !ELUsingAArch32(EL2) then R(t, t2) = PhysicalCountInt() - CNTVOFF_EL2(); elsif HaveEL(EL2) && IsFeatureImplemented(FEAT_AA32EL2) then R(t, t2) = PhysicalCountInt() - CNTVOFF(); else R(t, t2) = PhysicalCountInt(); end; end;

AArch32 Registers
AArch64 Registers
AArch32 Instructions
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2026-03-26 20:27:25, 2026-03_rel

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