This is a collection of Intel®’ IA32® Software Developer's Manuals (URL of the day) and AMD' AMD64 Architecture Programmer's Manual together with the related specifications, application notes, white papers, and change logs. The collection aims to keep all available revisions. It was originally created by Michal Necasek, see OS/2 Museum.

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AArch64 System Instructions

AArch64 System Instructions

APAS: Associate PA space

AT S12E0R: Address Translate Stages 1 and 2 EL0 Read

AT S12E0W: Address Translate Stages 1 and 2 EL0 Write

AT S12E1R: Address Translate Stages 1 and 2 EL1 Read

AT S12E1W: Address Translate Stages 1 and 2 EL1 Write

AT S1E0R: Address Translate Stage 1 EL0 Read

AT S1E0W: Address Translate Stage 1 EL0 Write

AT S1E1A: Address Translate Stage 1 EL1 Without Permission checks

AT S1E1R: Address Translate Stage 1 EL1 Read

AT S1E1RP: Address Translate Stage 1 EL1 Read PAN

AT S1E1W: Address Translate Stage 1 EL1 Write

AT S1E1WP: Address Translate Stage 1 EL1 Write PAN

AT S1E2A: Address Translate Stage 1 EL2 Without Permission checks

AT S1E2R: Address Translate Stage 1 EL2 Read

AT S1E2W: Address Translate Stage 1 EL2 Write

AT S1E3A: Address Translate Stage 1 EL3 Without Permission checks

AT S1E3R: Address Translate Stage 1 EL3 Read

AT S1E3W: Address Translate Stage 1 EL3 Write

BRB IALL: Invalidate the Branch Record Buffer

BRB INJ: Branch Record Injection into the Branch Record Buffer

CFP RCTX: Control Flow Prediction Restriction by Context

COSP RCTX: Clear Other Speculative Prediction Restriction by Context

CPP RCTX: Cache Prefetch Prediction Restriction by Context

DC CGDSW: Clean of Data and Allocation Tags by Set/Way

DC CGDVAC: Clean of Data and Allocation Tags by VA to PoC

DC CGDVADP: Clean of Data and Allocation Tags by VA to PoDP

DC CGDVAOC: Clean of Data and Allocation Tags by VA to Outer Cache level

DC CGDVAP: Clean of Data and Allocation Tags by VA to PoP

DC CGSW: Clean of Allocation Tags by Set/Way

DC CGVAC: Clean of Allocation Tags by VA to PoC

DC CGVADP: Clean of Allocation Tags by VA to PoDP

DC CGVAP: Clean of Allocation Tags by VA to PoP

DC CIGDPAE: Clean and invalidate of data and allocation tags by PA to PoE

DC CIGDPAPA: Clean and Invalidate of Data and Allocation Tags by PA to PoPA

DC CIGDSW: Clean and Invalidate of Data and Allocation Tags by Set/Way

DC CIGDVAC: Clean and Invalidate of Data and Allocation Tags by VA to PoC

DC CIGDVAOC: Clean and Invalidate of Data and Allocation Tags by VA to Outer Cache level

DC CIGDVAPS: Clean and Invalidate of Data and Allocation Tags by VA to PoPS

DC CIGSW: Clean and Invalidate of Allocation Tags by Set/Way

DC CIGVAC: Clean and Invalidate of Allocation Tags by VA to PoC

DC CIPAE: Data or unified Cache line Clean and Invalidate by PA to PoE

DC CIPAPA: Data or unified Cache line Clean and Invalidate by PA to PoPA

DC CISW: Data or unified Cache line Clean and Invalidate by Set/Way

DC CIVAC: Data or unified Cache line Clean and Invalidate by VA to PoC

DC CIVAOC: Data or unified Cache line Clean and Invalidate by VA to Outer Cache level

DC CIVAPS: Clean and Invalidate of Data by VA to PoPS

DC CSW: Data or unified Cache line Clean by Set/Way

DC CVAC: Data or unified Cache line Clean by VA to PoC

DC CVADP: Data or unified Cache line Clean by VA to PoDP

DC CVAOC: Data or unified Cache line Clean by VA to Outer Cache level

DC CVAP: Data or unified Cache line Clean by VA to PoP

DC CVAU: Data or unified Cache line Clean by VA to PoU

DC GVA: Data Cache set Allocation Tag by VA

DC GZVA: Data Cache set Allocation Tags and Zero by VA

DC IGDSW: Invalidate of Data and Allocation Tags by Set/Way

DC IGDVAC: Invalidate of Data and Allocation Tags by VA to PoC

DC IGSW: Invalidate of Allocation Tags by Set/Way

DC IGVAC: Invalidate of Allocation Tags by VA to PoC

DC ISW: Data or unified Cache line Invalidate by Set/Way

DC IVAC: Data or unified Cache line Invalidate by VA to PoC

DC ZVA: Data Cache Zero by VA

DVP RCTX: Data Value Prediction Restriction by Context

GCSPOPCX: Guarded Control Stack Pop and Compare exception return record

GCSPOPM: Guarded Control Stack Pop

GCSPOPX: Guarded Control Stack Pop exception return record

GCSPUSHM: Guarded Control Stack Push

GCSPUSHX: Guarded Control Stack Push exception return record

GCSSS1: Guarded Control Stack Switch Stack 1

GCSSS2: Guarded Control Stack Switch Stack 2

IC IALLU: Instruction Cache Invalidate All to PoU

IC IALLUIS: Instruction Cache Invalidate All to PoU, Inner Shareable

IC IVAU: Instruction Cache line Invalidate by VA to PoU

SYS S1_<op1>_<Cn>_<Cm>_<op2>, SYSL S1_<op1>_<Cn>_<Cm>_<op2>, SYSP S1_<op1>_<Cn>_<Cm>_<op2>: IMPLEMENTATION DEFINED System instructions

TLBI ALLE1, TLBI ALLE1NXS: TLB Invalidate All, EL1

TLBI ALLE1IS, TLBI ALLE1ISNXS: TLB Invalidate All, EL1, Inner Shareable

TLBI ALLE1OS, TLBI ALLE1OSNXS: TLB Invalidate All, EL1, Outer Shareable

TLBI ALLE2, TLBI ALLE2NXS: TLB Invalidate All, EL2

TLBI ALLE2IS, TLBI ALLE2ISNXS: TLB Invalidate All, EL2, Inner Shareable

TLBI ALLE2OS, TLBI ALLE2OSNXS: TLB Invalidate All, EL2, Outer Shareable

TLBI ALLE3, TLBI ALLE3NXS: TLB Invalidate All, EL3

TLBI ALLE3IS, TLBI ALLE3ISNXS: TLB Invalidate All, EL3, Inner Shareable

TLBI ALLE3OS, TLBI ALLE3OSNXS: TLB Invalidate All, EL3, Outer Shareable

TLBI ASIDE1, TLBI ASIDE1NXS: TLB Invalidate by ASID, EL1

TLBI ASIDE1IS, TLBI ASIDE1ISNXS: TLB Invalidate by ASID, EL1, Inner Shareable

TLBI ASIDE1OS, TLBI ASIDE1OSNXS: TLB Invalidate by ASID, EL1, Outer Shareable

TLBI IPAS2E1, TLBI IPAS2E1NXS: TLB Invalidate by Intermediate Physical Address, Stage 2, EL1

TLBI IPAS2E1IS, TLBI IPAS2E1ISNXS: TLB Invalidate by Intermediate Physical Address, Stage 2, EL1, Inner Shareable

TLBI IPAS2E1OS, TLBI IPAS2E1OSNXS: TLB Invalidate by Intermediate Physical Address, Stage 2, EL1, Outer Shareable

TLBI IPAS2LE1, TLBI IPAS2LE1NXS: TLB Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1

TLBI IPAS2LE1IS, TLBI IPAS2LE1ISNXS: TLB Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1, Inner Shareable

TLBI IPAS2LE1OS, TLBI IPAS2LE1OSNXS: TLB Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1, Outer Shareable

TLBI PAALL: TLB Invalidate GPT Information by PA, All Entries, Local

TLBI PAALLOS: TLB Invalidate GPT Information by PA, All Entries, Outer Shareable

TLBI RIPAS2E1, TLBI RIPAS2E1NXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, EL1

TLBI RIPAS2E1IS, TLBI RIPAS2E1ISNXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, EL1, Inner Shareable

TLBI RIPAS2E1OS, TLBI RIPAS2E1OSNXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, EL1, Outer Shareable

TLBI RIPAS2LE1, TLBI RIPAS2LE1NXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1

TLBI RIPAS2LE1IS, TLBI RIPAS2LE1ISNXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1, Inner Shareable

TLBI RIPAS2LE1OS, TLBI RIPAS2LE1OSNXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1, Outer Shareable

TLBI RPALOS: TLB Range Invalidate GPT Information by PA, Last level, Outer Shareable

TLBI RPAOS: TLB Range Invalidate GPT Information by PA, Outer Shareable

TLBI RVAAE1, TLBI RVAAE1NXS: TLB Range Invalidate by VA, All ASID, EL1

TLBI RVAAE1IS, TLBI RVAAE1ISNXS: TLB Range Invalidate by VA, All ASID, EL1, Inner Shareable

TLBI RVAAE1OS, TLBI RVAAE1OSNXS: TLB Range Invalidate by VA, All ASID, EL1, Outer Shareable

TLBI RVAALE1, TLBI RVAALE1NXS: TLB Range Invalidate by VA, All ASID, Last level, EL1

TLBI RVAALE1IS, TLBI RVAALE1ISNXS: TLB Range Invalidate by VA, All ASID, Last Level, EL1, Inner Shareable

TLBI RVAALE1OS, TLBI RVAALE1OSNXS: TLB Range Invalidate by VA, All ASID, Last Level, EL1, Outer Shareable

TLBI RVAE1, TLBI RVAE1NXS: TLB Range Invalidate by VA, EL1

TLBI RVAE1IS, TLBI RVAE1ISNXS: TLB Range Invalidate by VA, EL1, Inner Shareable

TLBI RVAE1OS, TLBI RVAE1OSNXS: TLB Range Invalidate by VA, EL1, Outer Shareable

TLBI RVAE2, TLBI RVAE2NXS: TLB Range Invalidate by VA, EL2

TLBI RVAE2IS, TLBI RVAE2ISNXS: TLB Range Invalidate by VA, EL2, Inner Shareable

TLBI RVAE2OS, TLBI RVAE2OSNXS: TLB Range Invalidate by VA, EL2, Outer Shareable

TLBI RVAE3, TLBI RVAE3NXS: TLB Range Invalidate by VA, EL3

TLBI RVAE3IS, TLBI RVAE3ISNXS: TLB Range Invalidate by VA, EL3, Inner Shareable

TLBI RVAE3OS, TLBI RVAE3OSNXS: TLB Range Invalidate by VA, EL3, Outer Shareable

TLBI RVALE1, TLBI RVALE1NXS: TLB Range Invalidate by VA, Last level, EL1

TLBI RVALE1IS, TLBI RVALE1ISNXS: TLB Range Invalidate by VA, Last level, EL1, Inner Shareable

TLBI RVALE1OS, TLBI RVALE1OSNXS: TLB Range Invalidate by VA, Last level, EL1, Outer Shareable

TLBI RVALE2, TLBI RVALE2NXS: TLB Range Invalidate by VA, Last level, EL2

TLBI RVALE2IS, TLBI RVALE2ISNXS: TLB Range Invalidate by VA, Last level, EL2, Inner Shareable

TLBI RVALE2OS, TLBI RVALE2OSNXS: TLB Range Invalidate by VA, Last level, EL2, Outer Shareable

TLBI RVALE3, TLBI RVALE3NXS: TLB Range Invalidate by VA, Last level, EL3

TLBI RVALE3IS, TLBI RVALE3ISNXS: TLB Range Invalidate by VA, Last level, EL3, Inner Shareable

TLBI RVALE3OS, TLBI RVALE3OSNXS: TLB Range Invalidate by VA, Last level, EL3, Outer Shareable

TLBI VAAE1, TLBI VAAE1NXS: TLB Invalidate by VA, All ASID, EL1

TLBI VAAE1IS, TLBI VAAE1ISNXS: TLB Invalidate by VA, All ASID, EL1, Inner Shareable

TLBI VAAE1OS, TLBI VAAE1OSNXS: TLB Invalidate by VA, All ASID, EL1, Outer Shareable

TLBI VAALE1, TLBI VAALE1NXS: TLB Invalidate by VA, All ASID, Last level, EL1

TLBI VAALE1IS, TLBI VAALE1ISNXS: TLB Invalidate by VA, All ASID, Last Level, EL1, Inner Shareable

TLBI VAALE1OS, TLBI VAALE1OSNXS: TLB Invalidate by VA, All ASID, Last Level, EL1, Outer Shareable

TLBI VAE1, TLBI VAE1NXS: TLB Invalidate by VA, EL1

TLBI VAE1IS, TLBI VAE1ISNXS: TLB Invalidate by VA, EL1, Inner Shareable

TLBI VAE1OS, TLBI VAE1OSNXS: TLB Invalidate by VA, EL1, Outer Shareable

TLBI VAE2, TLBI VAE2NXS: TLB Invalidate by VA, EL2

TLBI VAE2IS, TLBI VAE2ISNXS: TLB Invalidate by VA, EL2, Inner Shareable

TLBI VAE2OS, TLBI VAE2OSNXS: TLB Invalidate by VA, EL2, Outer Shareable

TLBI VAE3, TLBI VAE3NXS: TLB Invalidate by VA, EL3

TLBI VAE3IS, TLBI VAE3ISNXS: TLB Invalidate by VA, EL3, Inner Shareable

TLBI VAE3OS, TLBI VAE3OSNXS: TLB Invalidate by VA, EL3, Outer Shareable

TLBI VALE1, TLBI VALE1NXS: TLB Invalidate by VA, Last level, EL1

TLBI VALE1IS, TLBI VALE1ISNXS: TLB Invalidate by VA, Last level, EL1, Inner Shareable

TLBI VALE1OS, TLBI VALE1OSNXS: TLB Invalidate by VA, Last level, EL1, Outer Shareable

TLBI VALE2, TLBI VALE2NXS: TLB Invalidate by VA, Last level, EL2

TLBI VALE2IS, TLBI VALE2ISNXS: TLB Invalidate by VA, Last level, EL2, Inner Shareable

TLBI VALE2OS, TLBI VALE2OSNXS: TLB Invalidate by VA, Last level, EL2, Outer Shareable

TLBI VALE3, TLBI VALE3NXS: TLB Invalidate by VA, Last level, EL3

TLBI VALE3IS, TLBI VALE3ISNXS: TLB Invalidate by VA, Last level, EL3, Inner Shareable

TLBI VALE3OS, TLBI VALE3OSNXS: TLB Invalidate by VA, Last level, EL3, Outer Shareable

TLBI VMALLE1, TLBI VMALLE1NXS: TLB Invalidate by VMID, All at stage 1, EL1

TLBI VMALLE1IS, TLBI VMALLE1ISNXS: TLB Invalidate by VMID, All at stage 1, EL1, Inner Shareable

TLBI VMALLE1OS, TLBI VMALLE1OSNXS: TLB Invalidate by VMID, All at stage 1, EL1, Outer Shareable

TLBI VMALLS12E1, TLBI VMALLS12E1NXS: TLB Invalidate by VMID, All at Stage 1 and 2, EL1

TLBI VMALLS12E1IS, TLBI VMALLS12E1ISNXS: TLB Invalidate by VMID, All at Stage 1 and 2, EL1, Inner Shareable

TLBI VMALLS12E1OS, TLBI VMALLS12E1OSNXS: TLB Invalidate by VMID, All at Stage 1 and 2, EL1, Outer Shareable

TLBI VMALLWS2E1, TLBI VMALLWS2E1NXS: TLB Invalidate stage 2 dirty state by VMID, EL1&0

TLBI VMALLWS2E1IS, TLBI VMALLWS2E1ISNXS: TLB Invalidate stage 2 dirty state by VMID, EL1&0, Inner Shareable

TLBI VMALLWS2E1OS, TLBI VMALLWS2E1OSNXS: TLB Invalidate stage 2 write permission by VMID, EL1&0, Outer Shareable

TLBIP IPAS2E1, TLBIP IPAS2E1NXS: TLB Invalidate Pair by Intermediate Physical Address, Stage 2, EL1

TLBIP IPAS2E1IS, TLBIP IPAS2E1ISNXS: TLB Invalidate Pair by Intermediate Physical Address, Stage 2, EL1, Inner Shareable

TLBIP IPAS2E1OS, TLBIP IPAS2E1OSNXS: TLB Invalidate Pair by Intermediate Physical Address, Stage 2, EL1, Outer Shareable

TLBIP IPAS2LE1, TLBIP IPAS2LE1NXS: TLB Invalidate Pair by Intermediate Physical Address, Stage 2, Last level, EL1

TLBIP IPAS2LE1IS, TLBIP IPAS2LE1ISNXS: TLB Invalidate Pair by Intermediate Physical Address, Stage 2, Last level, EL1, Inner Shareable

TLBIP IPAS2LE1OS, TLBIP IPAS2LE1OSNXS: TLB Invalidate Pair by Intermediate Physical Address, Stage 2, Last level, EL1, Outer Shareable

TLBIP RIPAS2E1, TLBIP RIPAS2E1NXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, EL1

TLBIP RIPAS2E1IS, TLBIP RIPAS2E1ISNXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, EL1, Inner Shareable

TLBIP RIPAS2E1OS, TLBIP RIPAS2E1OSNXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, EL1, Outer Shareable

TLBIP RIPAS2LE1, TLBIP RIPAS2LE1NXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1

TLBIP RIPAS2LE1IS, TLBIP RIPAS2LE1ISNXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1, Inner Shareable

TLBIP RIPAS2LE1OS, TLBIP RIPAS2LE1OSNXS: TLB Range Invalidate by Intermediate Physical Address, Stage 2, Last level, EL1, Outer Shareable

TLBIP RVAAE1, TLBIP RVAAE1NXS: TLB Range Invalidate by VA, All ASID, EL1

TLBIP RVAAE1IS, TLBIP RVAAE1ISNXS: TLB Range Invalidate by VA, All ASID, EL1, Inner Shareable

TLBIP RVAAE1OS, TLBIP RVAAE1OSNXS: TLB Range Invalidate by VA, All ASID, EL1, Outer Shareable

TLBIP RVAALE1, TLBIP RVAALE1NXS: TLB Range Invalidate by VA, All ASID, Last level, EL1

TLBIP RVAALE1IS, TLBIP RVAALE1ISNXS: TLB Range Invalidate by VA, All ASID, Last Level, EL1, Inner Shareable

TLBIP RVAALE1OS, TLBIP RVAALE1OSNXS: TLB Range Invalidate by VA, All ASID, Last Level, EL1, Outer Shareable

TLBIP RVAE1, TLBIP RVAE1NXS: TLB Range Invalidate by VA, EL1

TLBIP RVAE1IS, TLBIP RVAE1ISNXS: TLB Range Invalidate by VA, EL1, Inner Shareable

TLBIP RVAE1OS, TLBIP RVAE1OSNXS: TLB Range Invalidate by VA, EL1, Outer Shareable

TLBIP RVAE2, TLBIP RVAE2NXS: TLB Range Invalidate by VA, EL2

TLBIP RVAE2IS, TLBIP RVAE2ISNXS: TLB Range Invalidate by VA, EL2, Inner Shareable

TLBIP RVAE2OS, TLBIP RVAE2OSNXS: TLB Range Invalidate by VA, EL2, Outer Shareable

TLBIP RVAE3, TLBIP RVAE3NXS: TLB Range Invalidate by VA, EL3

TLBIP RVAE3IS, TLBIP RVAE3ISNXS: TLB Range Invalidate by VA, EL3, Inner Shareable

TLBIP RVAE3OS, TLBIP RVAE3OSNXS: TLB Range Invalidate by VA, EL3, Outer Shareable

TLBIP RVALE1, TLBIP RVALE1NXS: TLB Range Invalidate by VA, Last level, EL1

TLBIP RVALE1IS, TLBIP RVALE1ISNXS: TLB Range Invalidate by VA, Last level, EL1, Inner Shareable

TLBIP RVALE1OS, TLBIP RVALE1OSNXS: TLB Range Invalidate by VA, Last level, EL1, Outer Shareable

TLBIP RVALE2, TLBIP RVALE2NXS: TLB Range Invalidate by VA, Last level, EL2

TLBIP RVALE2IS, TLBIP RVALE2ISNXS: TLB Range Invalidate by VA, Last level, EL2, Inner Shareable

TLBIP RVALE2OS, TLBIP RVALE2OSNXS: TLB Range Invalidate by VA, Last level, EL2, Outer Shareable

TLBIP RVALE3, TLBIP RVALE3NXS: TLB Range Invalidate by VA, Last level, EL3

TLBIP RVALE3IS, TLBIP RVALE3ISNXS: TLB Range Invalidate by VA, Last level, EL3, Inner Shareable

TLBIP RVALE3OS, TLBIP RVALE3OSNXS: TLB Range Invalidate by VA, Last level, EL3, Outer Shareable

TLBIP VAAE1, TLBIP VAAE1NXS: TLB Invalidate Pair by VA, All ASID, EL1

TLBIP VAAE1IS, TLBIP VAAE1ISNXS: TLB Invalidate Pair by VA, All ASID, EL1, Inner Shareable

TLBIP VAAE1OS, TLBIP VAAE1OSNXS: TLB Invalidate Pair by VA, All ASID, EL1, Outer Shareable

TLBIP VAALE1, TLBIP VAALE1NXS: TLB Invalidate Pair by VA, All ASID, Last level, EL1

TLBIP VAALE1IS, TLBIP VAALE1ISNXS: TLB Invalidate Pair by VA, All ASID, Last Level, EL1, Inner Shareable

TLBIP VAALE1OS, TLBIP VAALE1OSNXS: TLB Invalidate Pair by VA, All ASID, Last Level, EL1, Outer Shareable

TLBIP VAE1, TLBIP VAE1NXS: TLB Invalidate Pair by VA, EL1

TLBIP VAE1IS, TLBIP VAE1ISNXS: TLB Invalidate Pair by VA, EL1, Inner Shareable

TLBIP VAE1OS, TLBIP VAE1OSNXS: TLB Invalidate Pair by VA, EL1, Outer Shareable

TLBIP VAE2, TLBIP VAE2NXS: TLB Invalidate Pair by VA, EL2

TLBIP VAE2IS, TLBIP VAE2ISNXS: TLB Invalidate Pair by VA, EL2, Inner Shareable

TLBIP VAE2OS, TLBIP VAE2OSNXS: TLB Invalidate Pair by VA, EL2, Outer Shareable

TLBIP VAE3, TLBIP VAE3NXS: TLB Invalidate Pair by VA, EL3

TLBIP VAE3IS, TLBIP VAE3ISNXS: TLB Invalidate Pair by VA, EL3, Inner Shareable

TLBIP VAE3OS, TLBIP VAE3OSNXS: TLB Invalidate Pair by VA, EL3, Outer Shareable

TLBIP VALE1, TLBIP VALE1NXS: TLB Invalidate Pair by VA, Last level, EL1

TLBIP VALE1IS, TLBIP VALE1ISNXS: TLB Invalidate Pair by VA, Last level, EL1, Inner Shareable

TLBIP VALE1OS, TLBIP VALE1OSNXS: TLB Invalidate Pair by VA, Last level, EL1, Outer Shareable

TLBIP VALE2, TLBIP VALE2NXS: TLB Invalidate Pair by VA, Last level, EL2

TLBIP VALE2IS, TLBIP VALE2ISNXS: TLB Invalidate Pair by VA, Last level, EL2, Inner Shareable

TLBIP VALE2OS, TLBIP VALE2OSNXS: TLB Invalidate Pair by VA, Last level, EL2, Outer Shareable

TLBIP VALE3, TLBIP VALE3NXS: TLB Invalidate Pair by VA, Last level, EL3

TLBIP VALE3IS, TLBIP VALE3ISNXS: TLB Invalidate Pair by VA, Last level, EL3, Inner Shareable

TLBIP VALE3OS, TLBIP VALE3OSNXS: TLB Invalidate Pair by VA, Last level, EL3, Outer Shareable

TRCIT: Trace Instrumentation


2026-03-26 20:27:25, 2026-03_rel

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