SDER32

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SDER32_EL2, AArch32 Secure Debug Enable Register

Purpose

Configuration

AArch64 System register SDER32_EL2 bits [63:0] are architecturally mapped to AArch64 System register SDER32_EL3[63:0] when EL3 is implemented.

AArch64 System register SDER32_EL2 bits [31:0] are architecturally mapped to AArch32 System register SDER[31:0].

This register is present only when EL2 is implemented, FEAT_SEL2 is implemented, FEAT_AA32EL1 is implemented, and FEAT_AA64 is implemented. Otherwise, direct accesses to SDER32_EL2 are UNDEFINED.

Attributes

Field descriptions

Bits [63:2]

SUNIDEN, bit [1]

Secure User Non-Invasive Debug Enable.

SUNIDEN	Meaning
0b0	This bit has no effect on non-invasive debug.
0b1	Non-invasive debug is allowed in Secure EL0 using AArch32.

When Secure EL1 is using AArch32, the forms of non-invasive debug affected by this control are:

The PC Sample-based Profiling Extension. See About the PC Sample-based Profiling Extension.
When SelfHostedTraceEnabled() == FALSE, processor trace.
When EL3 is implemented, Performance Monitors.

When Secure EL1 is using AArch64, this bit has no effect.

The reset behavior of this field is:

On a Warm reset, this field resets to an architecturally UNKNOWN value.

SUIDEN, bit [0]
When EL3 is implemented:

Secure User Invasive Debug Enable.

SUIDEN	Meaning
0b0	This bit does not affect the generation of debug exceptions at Secure EL0.
0b1	If EL1 is using AArch32, debug exceptions from Secure EL0 are enabled.

The reset behavior of this field is:

On a Warm reset, this field resets to an architecturally UNKNOWN value.

Otherwise:

Accessing SDER32_EL2

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, SDER32_EL2

op0	op1	CRn	CRm	op2
0b11	0b100	0b0001	0b0011	0b001

if !(HaveEL(EL2) && IsFeatureImplemented(FEAT_SEL2) && IsFeatureImplemented(FEAT_AA32EL1) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if !IsCurrentSecurityState(SS_Secure) then Undefined(); elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then AArch64_SystemAccessTrap(EL2, 0x18); else Undefined(); end; elsif PSTATE.EL == EL2 then if !IsCurrentSecurityState(SS_Secure) then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then AArch64_SystemAccessTrap(EL3, 0x18); else X{64}(t) = SDER32_EL2(); end; elsif PSTATE.EL == EL3 then if SCR_EL3().EEL2 == '0' then Undefined(); else X{64}(t) = SDER32_EL2(); end; end;

MSR SDER32_EL2, <Xt>

op0	op1	CRn	CRm	op2
0b11	0b100	0b0001	0b0011	0b001

if !(HaveEL(EL2) && IsFeatureImplemented(FEAT_SEL2) && IsFeatureImplemented(FEAT_AA32EL1) && IsFeatureImplemented(FEAT_AA64)) then Undefined(); elsif PSTATE.EL == EL0 then Undefined(); elsif PSTATE.EL == EL1 then if !IsCurrentSecurityState(SS_Secure) then Undefined(); elsif EffectiveHCR_EL2_NVx() IN {'xx1'} then AArch64_SystemAccessTrap(EL2, 0x18); else Undefined(); end; elsif PSTATE.EL == EL2 then if !IsCurrentSecurityState(SS_Secure) then Undefined(); elsif HaveEL(EL3) && MDCR_EL3().TDA == '1' then AArch64_SystemAccessTrap(EL3, 0x18); else SDER32_EL2() = X{64}(t); end; elsif PSTATE.EL == EL3 then if SCR_EL3().EEL2 == '0' then Undefined(); else SDER32_EL2() = X{64}(t); end; end;

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RES0
RES0																														SUNIDEN	SUIDEN