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CTIINEN<n>

CTIINEN<n>, CTI Input Trigger to Output Channel Enable registers, n = 0 - 31

The CTIINEN<n> characteristics are:

Purpose

Enables the signaling of an event on output channels when input trigger event n is received by the CTI.

Configuration

CTIINEN<n> is in the Debug power domain.

If input trigger n is not implemented or not connected, CTIINEN<n> is RES0.

Attributes

CTIINEN<n> is a 32-bit register.

Field descriptions

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
INEN31	INEN30	INEN29	INEN28	INEN27	INEN26	INEN25	INEN24	INEN23	INEN22	INEN21	INEN20	INEN19	INEN18	INEN17	INEN16	INEN15	INEN14	INEN13	INEN12	INEN11	INEN10	INEN9	INEN8	INEN7	INEN6	INEN5	INEN4	INEN3	INEN2	INEN1	INEN0

INEN<x>, bit [x], for x = 31 to 0

Input trigger <n> to output channel <x> enable.

INEN<x>	Meaning
0b0	Input trigger <n> will not generate an event on output channel <x>.
0b1	Input trigger <n> will generate an event on output channel <x>.

The reset behavior of this field is:

On an External debug reset, this field resets to an architecturally UNKNOWN value.

Accessing this field has the following behavior:

When x >= UInt(CTIDEVID.NUMCHAN), access to this field is RAZ/WI.
Otherwise, access to this field is RW.

Accessing CTIINEN<n>

CTIINEN<n> can be accessed through the external debug interface:

Component	Offset	Instance
CTI	0x020 + (4 * n)	CTIINEN<n>

Accessible as follows:

When SoftwareLockStatus(addrdesc), accesses to this register are RO.
Otherwise, accesses to this register are RW.

2026-03-26 20:27:25, 2026-03_rel