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CTIOUTEN<n>

CTIOUTEN<n>, CTI Input Channel to Output Trigger Enable registers, n = 0 - 31

The CTIOUTEN<n> characteristics are:

Purpose

Defines which input channels generate output trigger n.

Configuration

CTIOUTEN<n> is in the Debug power domain.

If output trigger n is not implemented or not connected, CTIOUTEN<n> is RES0.

Attributes

CTIOUTEN<n> is a 32-bit register.

Field descriptions

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
OUTEN31	OUTEN30	OUTEN29	OUTEN28	OUTEN27	OUTEN26	OUTEN25	OUTEN24	OUTEN23	OUTEN22	OUTEN21	OUTEN20	OUTEN19	OUTEN18	OUTEN17	OUTEN16	OUTEN15	OUTEN14	OUTEN13	OUTEN12	OUTEN11	OUTEN10	OUTEN9	OUTEN8	OUTEN7	OUTEN6	OUTEN5	OUTEN4	OUTEN3	OUTEN2	OUTEN1	OUTEN0

OUTEN<x>, bit [x], for x = 31 to 0

Input channel <x> to output trigger <n> enable.

OUTEN<x>	Meaning
0b0	An event on input channel <x> will not cause output trigger <n> to be asserted.
0b1	An event on input channel <x> will cause output trigger <n> to be asserted.

The reset behavior of this field is:

On an External debug reset, this field resets to an architecturally UNKNOWN value.

Accessing this field has the following behavior:

When x >= UInt(CTIDEVID.NUMCHAN), access to this field is RAZ/WI.
Otherwise, access to this field is RW.

Accessing CTIOUTEN<n>

CTIOUTEN<n> can be accessed through the external debug interface:

Component	Offset	Instance
CTI	0x0A0 + (4 * n)	CTIOUTEN<n>

Accessible as follows:

When SoftwareLockStatus(addrdesc), accesses to this register are RO.
Otherwise, accesses to this register are RW.

2026-03-26 20:27:25, 2026-03_rel