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EDCIDR3, External Debug Component Identification Register 3

The EDCIDR3 characteristics are:

Purpose

Provides information to identify an external debug component.

For more information, see 'About the Component Identification scheme'.

Configuration

When FEAT_DoPD is implemented, EDCIDR3 is in the Core power domain. Otherwise, EDCIDR3 is in the Debug power domain.

Implementation of this register is OPTIONAL.

This register is required for CoreSight compliance.

Attributes

EDCIDR3 is a 32-bit register.

Field descriptions

Bits [31:8]

PRMBL_3, bits [7:0]

Accessing EDCIDR3

EDCIDR3 can be accessed through the external debug interface:

Accessible as follows:

• When FEAT_DoPD is implemented and !IsCorePowered(), accesses to this register generate an error response.
• Otherwise, accesses to this register are RO.

2026-03-26 20:27:25, 2026-03_rel

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