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TRBLAR, Lock Access Register

The TRBLAR characteristics are:

Purpose

For components that implement the Software Lock, used to lock and unlock the Software Lock. This component does not implement the Software Lock.

For additional information, see the CoreSight Architecture Specification.

Configuration

TRBLAR is in the Core power domain.

This register is present only when FEAT_TRBE_EXT is implemented. Otherwise, direct accesses to TRBLAR are RES0.

Attributes

TRBLAR is a 32-bit register.

Field descriptions

Bits [31:0]

Accessing TRBLAR

TRBLAR can be accessed through the external debug interface:

Accessible as follows:

• When DoubleLockStatus() or !IsCorePowered(), accesses to this register generate an error response.
• Otherwise, accesses to this register are WO.

2026-03-26 20:27:25, 2026-03_rel

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