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TRBPIDR1

TRBPIDR1, Peripheral Identification Register 1

The TRBPIDR1 characteristics are:

Purpose

Provides discovery information about the component.

For additional information, see the CoreSight Architecture Specification.

Configuration

TRBPIDR1 is in the Core power domain.

This register is present only when FEAT_TRBE_EXT is implemented. Otherwise, direct accesses to TRBPIDR1 are RES0.

Attributes

TRBPIDR1 is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0DES_0PART_1

Bits [31:8]

Reserved, RES0.

DES_0, bits [7:4]

Designer, JEP106 identification code, bits [3:0].

The JEP106 identification and continuation codes are stored as follows:

These codes indicate the designer of the component and not the implementer, except where the two are the same. To obtain a number, or to see the assignment of these codes, contact JEDEC http://www.jedec.org.

A JEP106 identification and continuation code takes the following form:

The parity bit in the JEP106 identification code is not included.

Note

For example, Arm Limited is assigned the code 0x7F 0x7F 0x7F 0x7F 0x3B.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

PART_1, bits [3:0]

Part number, which is selected by the designer of the component and stored as follows:

When a 12-bit part number is used, TRBPIDR2.REVISION indicates revision information.

The choice of using a 12-bit part number or 16-bit part number is specific to the designer of the component.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Accessing TRBPIDR1

TRBPIDR1 can be accessed through the external debug interface:

ComponentOffsetInstance
TRBE0xFE4TRBPIDR1

Accessible as follows:


2026-03-26 20:27:25, 2026-03_rel

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